Peter De Dobbelaere
Peter De Dobbelaere received his PhD degree in integrated optics from the University of Gent, Belgium in 1995. From 1995 to 1999, he was with Akzo-Nobel N.V., The Netherlands and US, where he was engaged in product development and reliability of polymer-based thermo-optic waveguide devices. In 1999, he joined OMM, San Diego, CA, where he was responsible for product and technology development of MEMS-based optical switches. In 2004, he joined Luxtera, Carlsbad, CA, where he is currently responsible for engineering and technology development for silicon photonics products.
Prof. of Electrical and Computer Engineering and Founder
University of Delaware, National University of Singapore and OpSIS
Michael Hochberg received his BS in physics, MS in applied physics, and PhD in applied physics from Caltech. He was awarded the Demetriades-Tsafka Dissertation Prize in Nanotechnology, as well as an NSF Graduate Research Fellowship. As an undergraduate he received a merit-based fellowship from Caltech and he co-founded two companies: Simulant and Luxtera.
In 2007, Michael joined the faculty at the University of Washington where he received an Air Force Office of Scientific Research Young Investigators Program award, as well as a 2009 Presidential Early Career Award in Science and Engineering. He is currently an associate professor in electrical and computer engineering, materials science and engineering, and chemical and biomolecular engineering at the University of Delaware, and has joined the faculty in a joint position at the National University of Singapore, with an attachment at the Institute for Microelectronics, A*Star. He currently directs the OpSIS effort at the University of Delaware. His work has been funded by Intel, AFOSR, DARPA, NSF, and Mentor Graphics, as well as numerous other companies and government agencies. His lab groups at UD and NUS have now produced multiple early-stage spinoff companies.
Institute of Microelectronics
Dim-Lee Kwong is the executive director of Institute of Microelectronics (IME), Agency for Science, Technology and Research (A*STAR), Singapore and a Professor of Electrical and Computer Engineering at National University of Singapore. He was an Earl N. and Margaret Bransfield Endowed Professor of Electrical and Computer Engineering at The University of Texas at Austin from 1990-2007, and the Temasek Professor of National University of Singapore from 2001-2004.
Dim-Lee received the IBM Faculty Award in 1984-86, Semiconductor Research Corporation Inventor Awards in 1993-94, Halliburton Foundation Excellent Teaching Award in 1994, Engineering Foundation Award in 1995, IEEE George Smith Award in 2007, and the 2011 IEEE Frederik Philips Award with citation: For leadership in silicon technology and excellence in the management of microelectronics R&D. He is an IEEE Fellow, the author of more than 1100 referred archival publications, has presented more than 90 plenary and invited talks at international conferences, and has been awarded more than 25 US patents. More than 57 students have received their PhD degrees under his supervision.
Stephane currently works at Ericsson Research in Montreal where he drives the Optical Short-Reach Interconnect research area he setup a few years ago. Through numerous university, internal, and third-party industry collaborations, he looks into the use of photonic technologies to revolutionize system architecture and interconnections. One important and active field of investigation covered by him and his collaborators is related to the integration and packaging of silicon photonics, its required characteristics, and the development of companion technologies to take it to products. As such, he his closely involved with product line, strategic sourcing, and CTO office on technology strategy and supplier interactions.
He holds an M.Sc in solid state physics from Sherbrooke University and has fifteen years of experience in high-tech R&D. Stephane is also on the board of director of the Canadian Photonics Industry Consortium and responsible for an Ericsson-NSERC CRD on short-reach photonics with McGill University professor David Plant. He authored numerous patent applications and holds patents in the field of short-reach photonics.
Linda C. Matthew, senior analyst at TechSearch International, earned her BS and MS degrees in materials science and engineering from MIT in 1985 and 1986, respectively. She spent seven years as a development engineer at the IBM Watson Research Center in Yorktown Heights, New York, working on leading edge packaging technologies. In 1993 she joined Tessera, and moved to the San Francisco bay area, where she was responsible first for development, and later for the technical marketing, of the µBGA®. She subsequently worked at nCHIP, doing technical marketing of MCMs, then at LSI Logic. She has authored numerous publications and holds seven US and four foreign patents. She has served as president of the Santa Clara, California IEEE CPMT chapter, and served for four years on the committee of the International Electronics Manufacturing Technology symposium. She is a member of IEEE CPMT and MEPTEC.
Richard Otte has been president and CEO of Promex Industries of Santa Clara, California since 1995.
Prior to that he was the general manager of AMP’s (now Tyco’s) Kaptron Passive Fiber Optic Products Subsidiary in Palo Alto. Prior to that he was president of Advanced Packaging Systems, a Raychem-Corning Joint Venture, and was with other Raychem business units for 20+ years where he filled various positions, many related to the electronics industry.
Early in his career, Richard was an electronics engineer. He has eleven patents, is a member of the IEEE, IPC, OSA, SMTA, MEPTEC, the ITRS A&P Roadmap sub-committee, chairs the iNemi Optoelectronics Roadmap Technical Working Group, and represents iNemi on the MIT CTR Board.
He earned his BSEE and MSEE from MIT, and his MBA from Harvard University
Executive Director of Global Strategy and Business Development
Kaivan Karimi is the executive director of global strategy and business development for the Microcontroller group at Freescale Semiconductor. In this role, he is responsible for defining and driving the technology, product and business strategies related to the Internet of Things (IoT) . He has authored multiple white papers and blogs and has presented at multiple forums and panels, and is the spokesperson and subject matter expert for all IoT related activities.
Most recently, Kaivan has presented at Touch, Gesture, Motion (TGM) US, Wireless Sensor Networks & RTLS Europe, Energy Harvesting & Storage Europe, Design West, Sensors Expo, GigaOm event Austin, Printed Electronics Japan, and the Global Semiconductor Alliance (GSA) Silicon Summit.
Kaivan has been with Freescale for more than ten years serving in a variety of leadership roles, including leading the cellular handset wireless product management, networking baseband processing, and serving as the head of Corporate Development (M&As and Divestitures). Kaivan has more than 19 years of experience in the semiconductor and telecomm industry. He has a Master of Sciences in Electrical Engineering from Florida Atlantic University and a Master of Business Administration from Baylor University.
Douglas Chen-Hua Yu
Senior Director of Integrated Interconnect and Packaging Division
Douglas Yu is a senior director at TSMC R&D, currently in charge of backend development. On interconnect, he has been responsible for on-chip metallization technology development for many nodes from 0.5m down to 28nm. The interconnect includes Al/SiO2, Al/FSG, Cu/FSG, Cu/Low-K, Cu/ELK and Low-R/ELK.
On packaging, Douglas’ role is to deliver wide range solutions from advanced bumpings, fine-pitch flip-chip with low cost, wafer-level-packaging and 3D-stackings including TSV stacking with CoWoSTM flow.
Doug served as general co-chair of IEEE IITC, IEEE EDAPS, and ITRS Interconnect conferences. He also served as an advisory board member of IEEE IMPACT and was an industrial advisory board member of Microsystems Industrial Group at Microsystems Technology Laboratories/MIT. He received his PhD in material science and technology from Georgia Institute of Technology. He holds 368 US issued patents with numerous publications. He is an IEEE Fellow.
Vice President of 3D Technology
Sitaram Arkalgud is vice president of 3D Technology at Invensas Corporation, a complete Interconnectology solutions provider for advanced mobile applications. Previously, Sitaram started and led 3D IC development at SEMATECH, where the focus was on delivering manufacturable process technologies for 3D interconnects. In addition, he has worked in a variety of roles spanning R&D and manufacturing in memory and logic technologies at Infineon/Qimonda and Motorola. He holds a doctorate and master’s degree in materials engineering from Rensselaer Polytechnic Institute in Troy, NY, and a bachelor’s degree in metallurgical engineering from Karnataka Regional Engineering College, Suratkal, India. He is the author of several publications and holds fourteen US patents.
Vice President Strategic Business Development
Wilfried Bair, SUSS MicroTec’s vice president of strategic business development, is responsible for developing emerging market and business opportunities as well as strategic alliances for SUSS MicroTec. With many years of experience working in 3-D technologies and applications, he is focusing on SUSS’ 3-D packaging and 3-D integration product portfolio. Additionally, Wilfried is the general manager of SUSS MicroTec.
Wilfried has over twenty years of management and business development experience in the semiconductor equipment and device industry throughout Europe, the U.S., and Asia. He holds an MS in manufacturing engineering as well as marketing and business administration from Johannes Kepler University, Linz, Austria.
Georgia Institute of Technology
Muhannad S. Bakir received his BEE degree (summa cum laude) from Auburn University, Auburn, AL, and his MS and PhD degrees in electrical and computer engineering from Georgia Institute of Technology.
He is currently an associate professor and the ON Semiconductor Junior Professor in the School of Electrical and Computer Engineering at Georgia Tech. His areas of interest include three-dimensional electronic system integration, advanced cooling and power delivery for 3D systems, biosensors, and their integration with CMOS circuitry, and nanofabrication technology.
Dr. Bakir is the recipient of the 2013 Intel Early Career Faculty Honor Award, the 2012 DARPA Young Faculty Award, the 2011 IEEE CPMT Society Outstanding Young Engineer Award, and was an Invited Participant in the 2012 National Academy of Engineering Frontiers of Engineering Symposium. He is an associate editor of IEEE Transactions on Components, Packaging and Manufacturing Technology, and was a guest editor of the June 2011 Special Issue of IEEE Journal of Selected Topics in Quantum Electronics. Dr. Bakir serves as a committee member for the IEEE International 3DIC Conference, the IEEE International Interconnect Technology Conference (IITC), and the IEEE Electronic Components and Technology Conference (ECTC). He is also a member of the International Technology Roadmap for Semiconductors (ITRS) technical working group for Assembly and Packaging.
CTO Advanced Packaging & Manufacturing Business Unit
Rozalia Beica is currently the CTO and Business Unit Director leading Advanced / 3D Packaging and Semiconductor Manufacturing activities within Yole Développement. For more than fifteen years, Rozalia has been involved in the research, application and strategic marketing of WLP and 3D TSV at materials (Rohm and Haas), equipment (Semitool, Applied Materials, Lam Research), and device manufacturing (Maxim IC) organizations.
Rozalia has authored more than 50 papers and publications and she is actively participating in several advanced packaging committees worldwide. She has an MSc in chemical engineering (Romania), an MSc in management of technology (USA) and a global executive MBA from IE Business School (Spain).
Program Director 3D System Integration
Eric Beyne is program director of 3D system integration at IMEC. This team performs R&D in the field of high-density interconnection and packaging techniques focused on “system-in-a-package” integration, 3D-interconnections, wafer-level packaging, RF front-end design and technology using integrated passives and RF-MEMS as well as research on packaging reliability including thermal and thermo-mechanical characterization. Eric obtained a degree in electrical engineering in 1983 and the PhD in Applied Sciences in 1990, both from the University of Leuven (KU Leuven). He has been with IMEC since 1986. He is president of the IMAPS-Benelux committee, member of the IMAPS-Europe Liaison committee, elected member of the board of governors of the IEEE-CPMT society, and IEEE-CPMT Strategic Director for Region 8.
Senior AMD Fellow
Bryan Black received his PhD from Carnegie Mellon University. With over twenty years of experience, Bryan has had the honor of working at Motorola, Intel, and AMD. He has done a little of everything from devices to circuits to microarchitecture to test to packaging. Bryan is currently a Senior AMD Fellow and runs the AMD die stacking program..
Paul Enquist is a co-founder and the CTO/vice president of R&D at Ziptronix. He has more than twenty-five years experience developing and inventing semiconductor process technologies, including 3-D symmetric intrinsic device fabrication and 3-D integrated circuit fabrication core to the Ziptronix technology. Prior to joining Ziptronix, Paul spent nearly fifteen years with RTI International where he led a research team developing high performance heterojunction bipolar transistor materials, devices, and circuits. He has authored more than ninety publications and presentations related to the epitaxial growth and fabrication of Npn, Pnp and complementary HBTs and lasers, monolithic integration and low temperature direct bonding and has more than thirty-five issued U.S. patents.
Paul holds a PhD and MS in electrical engineering from Cornell University and a BS in engineering from Columbia University. He is an IEEE senior member and a member of Tau Beta Pi and Eta Kappa Nu.
Kazuki Fukuoka is a principal engineer of Technology Platform Development Group at Renesas, with responsibility of power delivery network, power management techniques, and 2.5D/3D design. He joined Renesas Technology in 2005 and moved to Renesas Electronics in 2010. He has been engaged in developing power management techniques from 90nm to 28nm technology nodes, and, since 2011, he is a chief designer of 2.5D/3D integration.
Kazuki holds a PhD in electrical and electronic engineering from Kobe University, Kobe, Japan.
IEEE Fellow and Consultant
Microelectronic Consultants of NC
Philip Garrou consults and is an expert witness in the areas of IC packaging and electronic materials. He is currently senior consultant for Yole Développement and blogger (“Insights from the Leading Edge”) for Solid State Technology.
He has served as president of the IEEE CPMT (2003-2005) and IMAPS (1998,) and is a Fellow of both organizations. He has authored three microelectronic texts including Handbook of 3D Integration.
Phil has won the Milton Kiver Award for Excellence in Electronic Packaging (1994); the Fraunhoffer International Adv. Packaging Award (2002); the IEEE CPMT Sustained Technical Achievement Award (2007) and Feldman Outstanding Contribution Award (2012); and the IMAPS Ashman Award (2000).
He retired from Dow Chemical in 2004 as global director of technology for their Advanced Electronic Materials business unit.
VP Marketing and Strategic Alliances
Peter Himes is in charge of worldwide marketing and ecosystem development activities for Silex Microsystems, the world’s largest pure-play MEMS foundry.Peter has over 25 years of experience in technology firms, including engineering, sales, marketing, and executive management positions at National Semiconductor, Impala Linear, Winbond, SiTime, and Quicksil. He has a BSEE in solid state electronics from the University of Connecticut and an MBA from Santa Clara University.
Chief Systems Architect
Executive Director, New Product Technology
Tower / Jazz
David Howard received his ScB in mechanical engineering, ScM and PhD degrees in materials science engineering, all from Brown University in Providence, Rhode Island, USA. His focus has been in process and device integration for new nodes, features, and devices in Si-CMOS-based manufacturing, in particular integration of CMOS, interconnect, passive devices, TSV, SiGe HBTs, sensors, SOI, and MEMS. He is currently executive director and Fellow, at TowerJazz, managing new technology implementation for programs that address mobile RF, high speed devices, sensors, and aerospace applications. Prior to Jazz, David held positions at IMEC, Rockwell Semiconductor & Conexant Systems (1995-2002). David was a remote assignee to SEMATECH (1998), participates in DARPA programs, and is a member of the ITRS wireless working group.
Subramanian S. Iyer
Subramanian S. Iyer is an IBM Fellow at the Systems and Technology Group, and is responsible for technology strategy and competitiveness, embedded memory, and three-dimensional integration. He obtained his B.Tech. at IIT-Bombay, and PhD at UCLA. His key technical contributions have been the development of the world’s first SiGe base HBT, Salicide, electrical Fuses, eDRAM and 45nm technology used at IBM and IBM’s development partners. His current technical interests and work lie in the area of 3-dimensional integration for memory sub-systems and the long-term semiconductor and packaging roadmap. He is a Distinguished Alumnus of IIT Bombay and received the IEEE Daniel Noble Medal for emerging technologies in 2012. He also studies Sanskrit in his spare time.
Indiana Integrated Circuits
Jason Kulick is an experienced research engineer in the semiconductor and MEMs space, and founded IIC along with Dr. Gary H. Bernstein. Jason led the creation of IIC through its spin-out from the University of Notre Dame, multiple rounds of equity funding, and numerous Quilt Packaging and custom R&D projects. He is a principal investigator on IIC research projects and oversees day-to-day operations. He is a graduate of the University of Notre Dame with a degree in electrical engineering, is author or co-author on over twenty publications, and inventor on several pending patents.
Senior Research Engineer
John Lannon is a senior research engineer and leader of the microsystem integration and packaging team in the Center for Materials and Electronics Technologies of RTI International (formerly a division of MCNC). He received his PhD degree (Physics) from West Virginia University in 1996 and joined MCNC thereafter. John has extensive experience in deposition (and characterization) studies of semiconducting, magnetic, metal, and dielectric thin films using molecular, ionic, and sputtered species.
In 2002, John assumed management responsibility for the Infrared Scene Projector (IRSP) technology transfer project focused on the fabrication of resistive IRSP devices based on technology developed at Honeywell. Since then, he has worked with Santa Barbara Infrared and Acumen Scientific to improve resistive IR emitter array yield through process modifications and materials development work. In 2007, John joined the Microsystem Integration and Packaging team and has contributed to the development of metal-metal bonding schemes for area arrays of high density interconnects and wafer level vacuum packaging of MEMS devices, as well as other microsystem integration and advanced packaging technologies.
Support Contractor to DARPA
Booz Allen Hamilton
Joseph Maurer is a lead associate at Booz Allen Hamilton in Arlington, Virginia and has been supporting DARPA/MTO as a SETA contractor since October 2008. His research interests include the thermal management of RF and computing components, compound semiconductor devices, high speed electronics, and heterogeneous integration. He earned a PhD in chemical engineering from the University of Virginia in 2008 with a focus in electrochemical microfabrication and during his time as a research assistant, he spent two semesters as a guest researcher at the National Institute of Standards and Technology in Gaithersburg, MD. Joseph is a member of IEEE and has served as a session chair and technical program committee member for CSICS. He has co-authored conference abstracts for both CSICS and CS Mantech, and has served as a short course instructor at the Phased Array Symposium.
Chief Technology Officer
Bob Patti attended Rose-Hulman Institute of Technology, earning bachelor of science degrees in both physics and electrical engineering. He founded an R&D company specializing in high-performance systems and ASICs and participated in the design of over 100 chips in the course of twelve years. Tezzaron Semiconductor grew from that company to become a leading force in 3D IC technology, building its first working 3D ICs in 2004.
Today Bob is the CTO of Tezzaron, using wafer-level stacking processes to create ultra high-density 3D memory products and other semiconductor sub-components. He received the SEMI Award for North America in 2009, served as vice-chairman of JEDEC's DDRIII / Future Memories Task Group, and holds eighteen US patents, numerous foreign patents, and many more pending patent applications in deep sub-micron semiconductor chip technologies.
Arif Rahman is an architect at Altera and manages the product architecture. He has more than 15 years of research and product development experience in circuits and architecture, design methodology, manufacturing technology, and supply chain strategy. Prior to Altera, he worked at Xilinx, Agere Systems, Lattice Semiconductor, and Polytechnic University, NY. Arif holds a PhD degree from MIT in electrical engineering and an MBA from Santa Clara University. He has authored numerous articles and has been granted 50 patents. He serves in the program committee of IEEE Custom Integrated Circuits Conference.
Business Development Manager
Sumant Sood is business development manager at SUSS MicroTec where he is responsible for evaluating and managing new process technologies and strategic business development in areas of 3D integration, MEMS and High brightness LEDs. He has more than ten years R&D experience in areas of wafer bonding, advanced packaging, and heterogeneous materials integration and has authored more than thirty papers. Sumant is a senior member of IEEE, co-chair of IEEE MEMS Bay Area Chapter for Packaging and Reliability and serves on the Semi 3DS-IC Task Force. He holds an MS in microelectronics from University of Central Florida and B.Tech in electrical engineering from Punjab University India.
Minsuk Suh received his master’s degree and doctorate degree in material science and engineering at KAIST (Korea Advanced Institute of Science and Technology). In 2000 he joined SK Hynix and was in charge of advanced package technology development including WLP, flip chip, and TSV. In 2011, he worked at SEMATECH as SK Hynix’ assignee and bonding and assembly expert for two years. Since March of 2013, he has been the leader of Advanced PKG development team of SK Hynix, which has the responsibility of TSV and WLP package technology and device development.
He has been a member of package and interconnect committee of Semicon Korea Technology Symposium since 2003, and chairman of package and interconnect committee of 2013 STS (Semicon Korea Technology Symposium) and a member of package and interconnect committee of the Korean conference on semiconductor since 2009.
Manager, Advanced Materials and Devices
Teledyne Scientific Company
Miguel Urteaga is the manager of the Advanced Material and Devices Department, Electronics Division at Teledyne Scientific Company. He received his MS and PhD degrees in electrical engineering from the University of California Santa Barbara in 2001 and 2003, respectively. His research is focused on the development of ultra-high speed transistor technologies, primarily in the InP material system. Miguel has led the development of Teledyne’s high performance InP HBT IC technologies. These technologies have been used to demonstrate state-of-the-art high speed mixed-signal and digital ICs including: >20GHz direct digital synthesizers (DDS), >200GHz static frequency dividers and power amplifiers, and 670GHz amplifier and transmitter/receiver ICs. Miguel is currently the program manager at Teledyne for the DARPA THz Electronics and Diverse Accessible Heterogeneous Integration (DAHI) programs. Under the DAHI program, Teledyne is developing 3D integration methods for combining high performance III-V technologies with Si CMOS. Miguel has authored or co-authored over seventy conference and journal publications.
E. Jan Vardaman
E. Jan Vardaman is president and founder of TechSearch International, which has provided licensing and consulting services in semiconductor packaging since 1987. She is the co-author of How to Make IC Packages (published in Japanese by Nikkan Kogyo Shinbunsha), a columnist with Circuits Assembly/Printed Circuit Board Fabrication, and the author of numerous publications on emerging trends in semiconductor packaging and assembly. She is a member of IEEE CPMT, SMTA, MEPTEC, IPC, IMAPS and SEMI. She was elected to two terms on the IEEE CPMT Board of Governors.
Before founding TechSearch International, Jan served on the corporate staff of Microelectronics and Computer Technology Corporation (MCC), the electronics industry’s first pre-competitive research consortium. She has made numerous presentations and organized panel discussions on 3D TSV.
Corporate Technology Development and IP Director
Markus is the corporate technology development and IP director at EVG. In this role, Markus oversees EV Group’s global process engineering team. His further responsibilities include the management of R&D partnerships and contracts with third party organizations such as companies or government-related entities, as well as intellectual property affairs associated with EVG’s process technology development efforts.
Markus received his educational background in electrical engineering from HTL Braunau, Austria. He started with EV Group as a project manager at the company’s headquarters in Austria in 2001 with focus on customer projects. In 2002, Markus transitioned to EV Group North America in Tempe, Arizona, where he served as the Director Technology North America till August 2006. His past work includes involvement in design, development, process technology, and many other aspects of capital equipment production at both EV Group and at his former job with a capital equipment supplier for non-semiconductor related industries. During his time at EV Group, Markus has been involved in 3D integration related projects.
Contact Karen Dobkin with questions or for more information at email@example.com, or 910.542.0006.
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